The present invention relates to a microcomputer, particularly a single-chip microcomputer.
Microcomputers generally comprise a CPU (central processing unit) comprising a control unit, an ALU (arithmetic logic unit), registers and the like, a memory device comprising a program memory in the form of a ROM (read-only memory) and/or a PROM (programmable ROM) and a data memory in the form of a RAM (random-access memory), and an I/O (input/output) device. In a single-chip microcomputer, all of the CPU, the memory device and the I/O device are built in a single IC (integrated circuit) chip. Such single-chip microcomputers are now widely used for control of various consumer goods and other devices.
With the recent development in the LSI (large scale integration) technology, the hardware of the microcomputer and the built-in peripheral equipment are getting more and more advanced. In line with this, it is now required that the organization of the instructions, or instruction set, be more advanced so that the functions of the microcomputer are fully utilized and programming by high-level languages via compilers is possible. For an instruction set to be recognized as an advanced instruction set, it is required to satisfy the following conditions:
(1) The instruction set should have sufficient instructions necessary for allowing various applications and compiling of the instructions.
(2) The instruction set should have a high addressing ability (designation of data by means of instruction). In other words, it should have a large number of addressing modes defining where the data (operand) should be brought from, and where the data should be stored, at the time of the execution of the instruction.
(3) Each of the instructions having various addressing modes of the instruction set should have an even addressing ability.
These conditions (1) through (3) can be satisfied if the number of the basic instructions can be increased. However, the number of instructions has a limit.
This will be explained in further detail in connection with a situation where each word consists of 8 bits.
Where each word consists of 8 bits, there are 256 (=2.sup.8) instruction code spaces.
FIG. 1 schematically shows instruction code spaces in a matrix form. It is assumed that ten types of instructions including "load" (LD, in mnemonics) and "add" (ADD), "add with carry" (ADC) have six addressing modes. Accordingly, 60 instruction code spaces are required. Thus, it will be seen that as the number of addressing modes is increased, and as the number of types of instructions (the "types of instructions" are sometimes called "instructions" in this specification) having various addressing modes is increased, the number of instructions (in the sense of "types of instructions") to which the instruction code spaces can be allotted is decreased. Generally, the number of instructions in an 8-bit microcomputer having 4 to 7 addressing modes is about 100 to 120.
A method for increasing the number of instruction is shown in the "Z80 handbook" at page 58, published by CQ Publishing Co., Japan, on Jan. 10, 1985.
FIG. 2 shows a set of instruction codes illustrating this method.
In this method a specific code (=DD) of a first byte (8 bits) of an instruction is defined to mean that the next byte (second byte) is the real instruction code, and then the instruction codes of the second byte indicate instructions which are different from what the same instruction codes would have meant in the first byte. That is, the same instruction code is allotted to different instructions depending on whether it is in the first byte or in the second byte. With this method, the number of instructions is increased to 168, for example.
The above-described method has the disadvantage that the first byte does not convey any real instruction, and is used merely as a means for increasing the number of the instructions. As a result, the number of bytes constituting the instructions is increased and the efficiency of instruction (actual instructions per byte) is lowered and the time required for executing instructions is increased.